NXP LPC LWIP port documentation  v0.80
LWIP port for LPC devices
PHY status and control for the DP83848.

Defines

#define DP8_BMCR_REG   0x0
 DP83848 PHY register offsets.
#define DP8_BMSR_REG   0x1
#define DP8_ANADV_REG   0x4
#define DP8_ANLPA_REG   0x5
#define DP8_ANEEXP_REG   0x6
#define DP8_PHY_STAT_REG   0x10
#define DP8_PHY_INT_CTL_REG   0x11
#define DP8_PHY_STS_REG   0x19
#define DP8_RESET   (1 << 15)
 DP83848 Control register definitions.
#define DP8_LOOPBACK   (1 << 14)
#define DP8_SPEED_SELECT   (1 << 13)
#define DP8_AUTONEG   (1 << 12)
#define DP8_POWER_DOWN   (1 << 11)
#define DP8_ISOLATE   (1 << 10)
#define DP8_RESTART_AUTONEG   (1 << 9)
#define DP8_DUPLEX_MODE   (1 << 8)
#define DP8_COLLISION_TEST   (1 << 7)
#define DP8_100BASE_T4   (1 << 15)
 DP83848 Status register definitions.
#define DP8_100BASE_TX_FD   (1 << 14)
#define DP8_100BASE_TX_HD   (1 << 13)
#define DP8_10BASE_T_FD   (1 << 12)
#define DP8_10BASE_T_HD   (1 << 11)
#define DP8_MF_PREAMB_SUPPR   (1 << 6)
#define DP8_AUTONEG_COMP   (1 << 5)
#define DP8_RMT_FAULT   (1 << 4)
#define DP8_AUTONEG_ABILITY   (1 << 3)
#define DP8_LINK_STATUS   (1 << 2)
#define DP8_JABBER_DETECT   (1 << 1)
#define DP8_EXTEND_CAPAB   (1 << 0)
#define DP8_REMOTEFAULT   (1 << 6)
 DP83848 PHY status definitions.
#define DP8_FULLDUPLEX   (1 << 2)
#define DP8_SPEED10MBPS   (1 << 1)
#define DP8_VALID_LINK   (1 << 0)
#define DP8_PHYID1_OUI   0x2000
 DP83848 PHY ID register definitions.
#define DP8_PHYID2_OUI   0x5c90

Functions

err_t lpc_phy_init (struct netif *netif)
 Initialize the DP83848 PHY.
s32_t lpc_phy_sts_sm (struct netif *netif)
 Phy status update state machine.

Detailed Description

Various functions for controlling and monitoring the status of the DP83848 PHY. In polled (standalone) systems, the PHY state must be monitored as part of the application. In a threaded (RTOS) system, the PHY state is monitored by the PHY handler thread. The MAC driver will not transmit unless the PHY link is active.


Define Documentation

#define DP8_100BASE_T4   (1 << 15)

DP83848 Status register definitions.

T4 mode

#define DP8_100BASE_TX_FD   (1 << 14)

100MBps full duplex

#define DP8_100BASE_TX_HD   (1 << 13)

100MBps half duplex

#define DP8_10BASE_T_FD   (1 << 12)

100Bps full duplex

#define DP8_10BASE_T_HD   (1 << 11)

10MBps half duplex

#define DP8_ANADV_REG   0x4

Auto_Neg Advt Reg

#define DP8_ANEEXP_REG   0x6

Auto-neg Expansion Reg

#define DP8_ANLPA_REG   0x5

Auto_neg Link Partner Ability Reg

#define DP8_AUTONEG   (1 << 12)

1=Enable auto-negotiation

#define DP8_AUTONEG_ABILITY   (1 << 3)

Auto-negotation supported

#define DP8_AUTONEG_COMP   (1 << 5)

Auto-negotation complete

#define DP8_BMCR_REG   0x0

DP83848 PHY register offsets.

Basic Mode Control Register

#define DP8_BMSR_REG   0x1

Basic Mode Status Reg

#define DP8_COLLISION_TEST   (1 << 7)

1=Perform collsion test

#define DP8_DUPLEX_MODE   (1 << 8)

1=Full duplex mode

#define DP8_EXTEND_CAPAB   (1 << 0)

Supports extended capabilities

#define DP8_FULLDUPLEX   (1 << 2)

1=full duplex

#define DP8_ISOLATE   (1 << 10)

1=Isolate PHY

#define DP8_JABBER_DETECT   (1 << 1)

Jabber detect

#define DP8_LINK_STATUS   (1 << 2)

1=Link active

#define DP8_LOOPBACK   (1 << 14)

1=loopback Enabled

#define DP8_MF_PREAMB_SUPPR   (1 << 6)

Preamble suppress

#define DP8_PHY_INT_CTL_REG   0x11

PHY Interrupt Control Register

#define DP8_PHY_STAT_REG   0x10

PHY Status Register

#define DP8_PHY_STS_REG   0x19

PHY Status Register

#define DP8_PHYID1_OUI   0x2000

DP83848 PHY ID register definitions.

Expected PHY ID1

#define DP8_PHYID2_OUI   0x5c90

Expected PHY ID2

#define DP8_POWER_DOWN   (1 << 11)

1=Power down PHY

#define DP8_REMOTEFAULT   (1 << 6)

DP83848 PHY status definitions.

Remote fault

#define DP8_RESET   (1 << 15)

DP83848 Control register definitions.

1= S/W Reset

#define DP8_RESTART_AUTONEG   (1 << 9)

1=Restart auto-negoatiation

#define DP8_RMT_FAULT   (1 << 4)

Fault

#define DP8_SPEED10MBPS   (1 << 1)

1=10MBps speed

#define DP8_SPEED_SELECT   (1 << 13)

1=Select 100MBps

#define DP8_VALID_LINK   (1 << 0)

1=Link active


Function Documentation

err_t lpc_phy_init ( struct netif *  netif)

Initialize the DP83848 PHY.

This function initializes the DP83848 PHY. It will block until complete. This function is called as part of the EMAC driver initialization. Configuration of the PHY at startup is controlled by setting up configuration defines in lpc_phy.h.

Parameters:
[in]netifNETIF structure
Returns:
ERR_OK if the setup was successful, otherwise ERR_TIMEOUT
s32_t lpc_phy_sts_sm ( struct netif *  netif)

Phy status update state machine.

This function provides a state machine for maintaining the PHY status without blocking. It must be occasionally called for the PHY status to be maintained.

Parameters:
[in]netifNETIF structure