|Registers / WWDT Register description|
The WDTV register is used to read the current value of Watchdog timer counter.
When reading the value of the 24-bit counter, the lock and synchronization procedure takes up to 6 WDCLK cycles plus 6 PCLK cycles, so the value of WDTV is older than the actual value of the timer when it's being read by the CPU.
|23:0||COUNT||Counter timer value.||0x00 00FF|
|31:24||-||Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.||NA|
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