SYSCON UARTCLKDIV addressOffset = 0x094

This register configures the clock for the fractional baud rate generator and all USARTs. The UART clock can be disabled by setting the DIV field to zero (this is the default setting).

Table 1. SYSCON registerName = UARTCLKDIV addressOffset = 0x094
Bit Symbol Description Reset value
7:0 DIV USART fractional baud rate generator clock divider values. 0: Clock disabled. 1: Divide by 1. to 255: Divide by 255. 0
31:8 - Reserved -

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