SYSCON SYSRSTSTAT addressOffset = 0x030

The SYSRSTSTAT register shows the source of the latest reset event. The bits are cleared by writing a one to any of the bits. The POR event clears all other bits in this register. If another reset signal - for example the external RESET pin - remains asserted after the POR signal is negated, then its bit is set to detected. Write a one to clear the reset.

The reset value given in SYSCON registerName = SYSRSTSTAT addressOffset = 0x030 applies to the POR reset.

Table 1. SYSCON registerName = SYSRSTSTAT addressOffset = 0x030
Bit Symbol Value Description Reset value
0 POR   POR reset status 0
    0 No POR detected  
    1 POR detected. Writing a one clears this reset.  
1 EXTRST   Status of the external RESET pin. External reset status. 0
    0 No reset event detected.  
    1 Reset detected. Writing a one clears this reset.  
2 WDT   Status of the Watchdog reset 0
    0 No WDT reset detected  
    1 WDT reset detected. Writing a one clears this reset.  
3 BOD   Status of the Brown-out detect reset 0
    0 No BOD reset detected  
    1 BOD reset detected. Writing a one clears this reset.  
4 SYSRST   Status of the software system reset 0
    0 No System reset detected  
    1 System reset detected. Writing a one clears this reset.  
31:5 - - Reserved -

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