SYSCON SYSPLLCLKSEL addressOffset = 0x040

This register selects the clock source for the system PLL. The SYSPLLCLKUEN register (see SYSCON SYSPLLCLKUEN addressOffset = 0x044) must be toggled from LOW to HIGH for the update to take effect.

Table 1. SYSCON registerName = SYSPLLCLKSEL addressOffset = 0x040
Bit Symbol Value Description Reset value
1:0 SEL   System PLL clock source 0
    0x0 IRC  
    0x1 Crystal Oscillator (SYSOSC)  
    0x2 Reserved.  
    0x3 CLKIN. External clock input.  
31:2 - - Reserved -