SYSCON STARTERP1 addressOffset = 0x214

This register selects which interrupts wake the LPC81x from deep-sleep and power-down modes.

Note: Also enable the corresponding interrupts in the NVIC. See NVIC Connection of interrupt sources to the NVIC.
Table 1. SYSCON registerName = STARTERP1 addressOffset = 0x214
Bit Symbol Value Description Reset value
0 SPI0   SPI0 interrupt wake-up 0
    0 Disabled  
    1 Enabled  
1 SPI1   SPI1 interrupt wake-up 0
    0 Disabled  
    1 Enabled  
2 -   Reserved -
3 USART0   USART0 interrupt wake-up. Configure USART in synchronous slave mode. 0
    0 Disabled  
    1 Enabled  
4 USART1   USART1 interrupt wake-up. Configure USART in synchronous slave mode. 0
    0 Disabled  
    1 Enabled  
5 USART2   USART2 interrupt wake-up. Configure USART in synchronous slave mode. 0
    0 Disabled  
    1 Enabled  
7:6 -   Reserved -
8 I2C   I2C interrupt wake-up. 0
    0 Disabled  
    1 Enabled  
11:9 -   Reserved -
12 WWDT   WWDT interrupt wake-up 0
    0 Disabled  
    1 Enabled  
13 BOD   BOD interrupt wake-up 0
    0 Disabled  
    1 Enabled  
14 -   Reserved -
15 WKT   Self wake-up timer interrupt wake-up 0
    0 Disabled  
    1 Enabled  
31:16     Reserved. -

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