SYSCON PDAWAKECFG addressOffset = 0x234

This register controls the power configuration of the device when waking up from Deep-sleep or Power-down mode.

Table 1. SYSCON registerName = PDAWAKECFG addressOffset = 0x234
Bit Symbol Value Description Reset value
0 IRCOUT_PD   IRC oscillator output wake-up configuration 0
    0 Powered  
    1 Powered down  
1 IRC_PD   IRC oscillator power-down wake-up configuration 0
    0 Powered  
    1 Powered down  
2 FLASH_PD   Flash wake-up configuration 0
    0 Powered  
    1 Powered down  
3 BOD_PD   BOD wake-up configuration 0
    0 Powered  
    1 Powered down  
4 -   Reserved. 1
5 SYSOSC_PD   Crystal oscillator wake-up configuration 1
    0 Powered  
    1 Powered down  
6 WDTOSC_PD   Watchdog oscillator wake-up configuration. Changing this bit to powered-down has no effect when the LOCK bit in the WWDT MOD register is set. In this case, the watchdog oscillator is always running. 1
    0 Powered  
    1 Powered down  
7 SYSPLL_PD   System PLL wake-up configuration 1
    0 Powered  
    1 Powered down  
11:8 -   Reserved. Always write these bits as 0b1101 0b1101
14:12 -   Reserved. Always write these bits as 0b110 0b110
15 ACMP   Analog comparator wake-up configuration 1
    0 Powered  
    1 Powered down  
31:16 - - Reserved 0

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