SYSCON Set up the PLL

The PLL creates a stable output clock at a higher frequency than the input clock. If you need a main clock with a frequency higher than the 12 MHz IRC clock, use the PLL to boost the input frequency.

  1. Power up the system PLL in the PDRUNCFG register.

    SYSCON PDRUNCFG addressOffset = 0x238

  2. Select the PLL input in the SYSPLLCLKSEL register. You have the following input options:
    • IRC: 12 MHz internal oscillator.
    • System oscillator: External crystal oscillator using the XTALIN/XTALOUT pins.
    • External clock input CLKIN. Select this pin through the switch matrix.

    SYSCON SYSPLLCLKSEL addressOffset = 0x040

  3. Update the PLL clock source in the SYSPLLCLKUEN register.

    SYSCON SYSPLLCLKUEN addressOffset = 0x044

  4. Configure the PLL M and N dividers.

    SYSCON SYSPLLCTRL addressOffset = 0x008

  5. Wait for the PLL to lock by monitoring the PLL lock status.

    SYSCON SYSPLLSTAT addressOffset = 0x00C


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