SWM Register and register bit mapping

Register Offset 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
PINASSIGN0 0x000 U0_TXD_O U0_RXD_I U0_RTS_O U0_CTS_I
PINASSIGN1 0x004 U0_SCLK_IO U1_TXD_O U1_RXD_I U1_RTS_O
PINASSIGN2 0x008 U1_CTS_I U1_SCLK_IO U2_TXD_O U2_RXD_I
PINASSIGN3 0x00C U2_RTS_O U2_CTS_I U2_SCLK_IO SPI0_SCK_IO
PINASSIGN4 0x010 SPI0_MOSI_IO SPI0_MISO_IO SPI0_SSEL_IO SPI1_SCK_IO
PINASSIGN5 0x014 SPI1_MOSI_IO SPI1_MISO_IO SPI1_SSEL_IO CTIN_0_I
PINASSIGN6 0x018 CTIN_1_I CTIN_2_I CTIN_3_I CTOUT_0_O
PINASSIGN7 0x01C CTOUT_1_O CTOUT_2_O CTOUT_3_O I2C_SDA_IO
PINASSIGN8 0x020 I2C_SCL_IO ACMP_O_O CLKOUT_O GPIO_INT_BMAT_O
PINENABLE0 0x1C0 ACMP_I1_EN ACMP_I2_EN SWCLK_EN SWDIO_EN XTALIN_EN XTALOUT_EN RESET_EN CLKIN VDDCMP  

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