SPI Pin description

The SPI signals are movable functions and are assigned to external pins through the switch matrix.

See SWM Connect an internal signal to a package pin to assign the SPI functions to pins on the LPC81x package.

Table 1. SPI SPI Pin Description
Function Direction Pin Description SWM register Reference
SPI0_SCK I/O any Serial Clock. SCK is a clock signal used to synchronize the transfer of data. It is driven by the master and received by the slave. When the SPI interface is used, the clock is programmable to be active-high or active-low. SCK only switches during a data transfer. It is driven whenever the Master bit in the CFG register equals 1, regardless of the state of the Enable bit. PINASSIGN3 SWM registerName = PINASSIGN3 addressOffset = 0x00C
SPI0_MOSI I/O any Master Out Slave In. The MOSI signal transfers serial data from the master to the slave. When the SPI is a master, it outputs serial data on this signal. When the SPI is a slave, it clocks in serial data from this signal. MOSI is driven whenever the Master bit in the CFG register equals 1, regardless of the state of the Enable bit. PINASSIGN4 SWM registerName = PINASSIGN4 addressOffset = 0x010
SPI0_MISO I/O any Master In Slave Out. The MISO signal transfers serial data from the slave to the master. When the SPI is a master, serial data is input from this signal. When the SPI is a slave, serial data is output to this signal. MISO is driven when the SPI block is enabled, the Master bit in the CFG register equals 0, and when the slave is selected by one or more SSEL signals. PINASSIGN4 SWM registerName = PINASSIGN4 addressOffset = 0x010
SPI0_SSEL I/O any Slave Select . When the SPI interface is a master, it will drive the SSEL signals to an active state before the start of serial data and then release them to an inactive state after the serial data has been sent. By default, this signal is active low but can be selected to operate as active high. When the SPI is a slave, any SSEL in an active state indicates that this slave is being addressed. The SSEL pin is driven whenever the Master bit in the CFG register equals 1, regardless of the state of the Enable bit. PINASSIGN4 SWM registerName = PINASSIGN4 addressOffset = 0x010
SPI1_SCK I/O any Serial Clock. PINASSIGN4 SWM registerName = PINASSIGN4 addressOffset = 0x010
SPI1_MOSI I/O any Master Out Slave In. PINASSIGN5 SWM registerName = PINASSIGN5 addressOffset = 0x014
SPI1_MISO I/O any Master In Slave Out. PINASSIGN5 SWM registerName = PINASSIGN5 addressOffset = 0x014
SPI1_SSEL I/O any Slave Select. PINASSIGN5 SWM registerName = PINASSIGN5 addressOffset = 0x014

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