SPI INTSTAT addressOffset = 0x028

The read-only INTSTAT register provides a view of those interrupt flags that are currently enabled. This can simplify software handling of interrupts. See SPI registerName = STAT addressOffset = 0x008 for detailed descriptions of the interrupt flags.

Table 1. SPI SPI Interrupt Status register (INTSTAT, addresses 0x4005 8028 (SPI0) , 0x4005 C028 (SPI1)) bit description
Bit Symbol Description Reset value
0 RXRDY Receiver Ready flag. 0
1 TXRDY Transmitter Ready flag. 1
2 RXOV Receiver Overrun interrupt flag. 0
3 TXUR Transmitter Underrun interrupt flag. 0
4 SSA Slave Select Assert. 0
5 SSD Slave Select Deassert. 0
31:6 - Reserved. Read value is undefined, only zero should be written. NA