In sleep mode, any signal that triggers an SPI interrupt can wake up the part, provided that the interrupt is enabled in the INTENSET register and the NVIC. As long as the SPI clock SPI_PCLK remains active in sleep mode, the SPI can wake up the part independently of whether the SPI block is configured in master or slave mode.
In Deep-sleep or Power-down mode, the SPI clock is turned off as are all peripheral clocks. However, if the SPI is configured in slave mode and an external master provides the clock signal, the SPI can create an interrupt asynchronously. This interrupt, if enabled in the STARTERP1 register, in the NVIC, and in the SPI’s INTENSET register, can then wake up the core.
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