SCTimer/PWM OUT_SET addressOffset = 0x500

Each output n has one set register that controls how events affect each output. Whether outputs are set or cleared depends on the setting of the SETCLRn field in the SCT OUTPUTDIRCTRL register.

Table 1. SCTimer/PWM registerName = OUT[0:3]_SET addressOffset = 0x500
Bit Symbol Description Reset value
5:0 SET A 1 in bit m selects event m to set output n (or clear it if SETCLRn = 0x1 or 0x2) event 0 = bit 0, event 1 = bit 1,..., event 5 = bit 5. 0
31:6 - Reserved  

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