SCTimer/PWM OUTPUTDIRCTRL addressOffset = 0x054

This register specifies (for each output) the impact of the counting direction on the meaning of set and clear operations on the output (see SCTimer/PWM OUT_SET addressOffset = 0x500 and SCTimer/PWM OUT_CLR addressOffset = 0x504).

Table 1. SCTimer/PWM registerName = OUTPUTDIRCTRL addressOffset = 0x054
Bit Symbol Value Description Reset value
1:0 SETCLR0   Set/clear operation on output 0. Value 0x3 is reserved. Do not program this value. 0
    0x0 Any. Set and clear do not depend on any counter.  
    0x1 L counting down. Set and clear are reversed when counter L or the unified counter is counting down.  
    0x2 H counting down. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.  
3:2 SETCLR1   Set/clear operation on output 1. Value 0x3 is reserved. Do not program this value. 0
    0x0 Any. Set and clear do not depend on any counter.  
    0x1 L counting down. Set and clear are reversed when counter L or the unified counter is counting down.  
    0x2 H counting down. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.  
5:4 SETCLR2   Set/clear operation on output 2. Value 0x3 is reserved. Do not program this value. 0
    0x0 Any. Set and clear do not depend on any counter.  
    0x1 L counting down. Set and clear are reversed when counter L or the unified counter is counting down.  
    0x2 H counting down. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.  
7:6 SETCLR3   Set/clear operation on output 3. Value 0x3 is reserved. Do not program this value. 0
    0x0 Any. Set and clear do not depend on any counter.  
    0x1 L counting down. Set and clear are reversed when counter L or the unified counter is counting down.  
    0x2 H counting down. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.  
31:8 -   Reserved -

-->