|Registers / SCT Register description|
If UNIFY = 1 in the CONFIG register, only the _L bits are used.
If UNIFY = 0 in the CONFIG register, this register can be written to as two registers CAPCTRLn_L and CAPCTRLn_H. Both the L and H registers can be read or written individually or in a single 32-bit read or write operation.
Each Capture Control register (L, H, or unified 32-bit) controls which events load the corresponding Capture register from the counter.
|5:0||CAPCONm_L||If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1,..., event 5 = bit 5).||0|
|21:16||CAPCONm_H||If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17,..., event 5 = bit 21).||0|
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