To set up the SCT for multiple events and states, perform
the following configuration steps:
Configure the counter
- Configure the L and H counters in the CONFIG
register by selecting two independent 16-bit counters (L counter
and H counter) or one combined 32-bit counter in the UNIFY field.
- Select the SCT clock source in the CONFIG register (fields
CLKMODE and CLKSEL) from any of the inputs or an internal clock.
Configure the match and capture
- Select how many match and capture registers
the application uses (total of up to 5):
- In the REGMODE register, select for each
of the 5 match/capture register pairs whether the register is used
as a match register or capture register.
- Define match conditions for each match register selected:
- Each match register MATCH sets one match
value, if a 32-bit counter is used, or two match values, if the
L and H 16-bit counters are used.
- Each match reload register MATCHRELOAD sets a reload
value that is loaded into the match register when the counter reaches
a limit condition or the value 0.
Configure events and event responses
- Define when each event can occur in the
following way in the EVn_CTRL registers (up to 6, one register per
- Select whether the event occurs on an
input or output changing, on an input or output level, a match condition
of the counter, or a combination of match and input/output conditions
in field COMBMODE.
- For a match condition:
Select the match register that contains the match condition
for the event to occur. Enter the number of the selected match register
in field MATCHSEL.
If using L and H counters, define whether the event occurs
on matching the L or the H counter in field HEVENT.
- For an SCT input or output level or transition:
Select the input number or the output number that is
associated with this event in fields IOSEL and OUTSEL.
Define how the selected input or output triggers the
event (edge or level sensitive) in field IOCOND.
- Define what the effect of each event is on the SCT outputs
in the OUTn_SET or OUTn_CLR registers (up to 4 outputs, one register
- For each SCT output, select which events
set or clear this output. More than one event can change the output,
and each event can change multiple outputs.
- Define how each event affects the counter:
- Set the corresponding event bit in the
LIMIT register for the event to set an upper limit for the counter.
When a limit event occurs in unidirectional mode, the
counter is cleared to zero and begins counting up on the next clock
When a limit event occurs in bidirectional mode, the
counter begins to count down from the current value on the next
- Set the corresponding event bit in the HALT register
for the event to halt the counter. If the counter is halted, it
stops counting and no new events can occur. The counter operation
can only be restored by clearing the HALT_L and/or the HALT_H bits
in the CTRL register.
- Set the corresponding event bit in the STOP register
for the event to stop the counter. If the counter is stopped, it
stops counting. However, an event that is configured as a transition
on an input/output can restart the counter.
- Set the corresponding event bit in the START register
for the event to restart the counting. Only events that are defined
by an input changing can be used to restart the counter.
- Define which events contribute to the SCT interrupt:
- Set the corresponding event bit in the
EVEN and the EVFLAG registers to enable the event to contribute
to the SCT interrupt.
Configure multiple states
- In the EVn_STATE register for each event
(up to 6 events, one register per event), select the state or states
(up to 2) in which this event is allowed to occur. Each state can
be selected for more than one event.
- Determine how the event affects the system state:
In the EVn_CTRL registers (up to 6 events, one register
per event), set the new state value in the STATEV field for this
event. If the event is the highest numbered in the current state,
this value is either added to the existing state value or replaces
the existing state value, depending on the field STATELD.
Note: If there are higher numbered events in the current state,
this event cannot change the state.
If the STATEV and STATELD values are set to zero, the
state does not change.
- There are a certain (selectable) number
of capture registers. Each capture register can be programmed to
capture the counter contents when one or more events occur.
- If the counter is in bidirectional mode, the effect of
set and clear of an output can be made to depend on whether the
counter is counting up or down by writing to the OUTPUTDIRCTRL register.