|Power Monitor Unit (PMU) / PMU Power management|
In Active mode, the ARM Cortex-M0+ core, memories, and peripherals are clocked by the system clock or main clock.
The chip is in Active mode after reset and the default power configuration is determined by the reset values of the PDRUNCFG and SYSAHBCLKCTRL registers. The power configuration can be changed during run time.
Power consumption in Active mode is determined by the following configuration choices:
The SYSAHBCLKCTRL register controls which memories and peripherals are running (SYSCON registerName = SYSAHBCLKCTRL addressOffset = 0x080).
The power to various analog blocks (PLL, oscillators, the BOD circuit, and the flash block) can be controlled at any time individually through the PDRUNCFG register (SYSCON registerName = PDRUNCFG addressOffset = 0x238).
The USART and CLKOUT use individual peripheral clocks with their own clock dividers. The peripheral clocks can be shut down through the corresponding clock divider registers.
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