PINT PMCFG addressOffset = 0x030

The bit-slice configuration register configures the detect logic and contains bits to select from among eight alternative conditions for each bit slice that cause that bit slice to contribute to a pattern match. The seven LSBs of this register specify which bit-slices are the end-points of product terms in the boolean expression (i.e. where OR terms are to be inserted in the expression).

Two types of edge detection on each input are possible:

  • Sticky: A rising edge, a falling edge, or a rising or falling edge that is detected at any time after the edge-detection mechanism has been cleared. The input qualifies as detected (the detect logic output remains HIGH) until the pattern match engine detect logic is cleared again.
  • Non-sticky: Every time an edge (rising or falling) is detected, the detect logic output for this pin goes HIGH. This bit is cleared after one clock cycle, and the edge detect logic can detect another edge,
Note: To clear the pattern match engine detect logic, write any value to either the PMCFG register or the PMSRC register, or disable the pattern-match feature (by clearing both the SEL_PMATCH and ENA_RXEV bits in the PMCTRL register to zeros). This will erase all edge-detect history.

To select whether a slice marks the final component in a minterm of the boolean expression, write a 1 in the corresponding PROD_ENPTSn bit. Setting a term as the final component has two effects:

  1. The interrupt request associated with this bit slice will be asserted whenever a match to that product term is detected.
  2. The next bit slice will start a new, independent product term in the boolean expression (i.e. an OR will be inserted in the boolean expression following the element controlled by this bit slice).
Table 1. PINT registerName = PMCFG addressOffset = 0x030
Bit Symbol Value Description Reset value
0 PROD_ENDPTS0   Determines whether slice 0 is an endpoint. 0
    0 No effect. Slice 0 is not an endpoint.  
    1 endpoint. Slice 0 is the endpoint of a product term (minterm). Pin interrupt 0 in the NVIC is raised if the minterm evaluates as true.  
1 PROD_ENDPTS1   Determines whether slice 1 is an endpoint. 0
    0 No effect. Slice 1 is not an endpoint.  
    1 endpoint. Slice 1 is the endpoint of a product term (minterm). Pin interrupt 1 in the NVIC is raised if the minterm evaluates as true.  
2 PROD_ENDPTS2   Determines whether slice 2 is an endpoint. 0
    0 No effect. Slice 2 is not an endpoint.  
    1 endpoint. Slice 2 is the endpoint of a product term (minterm). Pin interrupt 2 in the NVIC is raised if the minterm evaluates as true.  
3 PROD_ENDPTS3   Determines whether slice 3 is an endpoint. 0
    0 No effect. Slice 3 is not an endpoint.  
    1 endpoint. Slice 3 is the endpoint of a product term (minterm). Pin interrupt 3 in the NVIC is raised if the minterm evaluates as true.  
4 PROD_ENDPTS4   Determines whether slice 4 is an endpoint. 0
    0 No effect. Slice 4 is not an endpoint.  
    1 endpoint. Slice 4 is the endpoint of a product term (minterm). Pin interrupt 4 in the NVIC is raised if the minterm evaluates as true.  
5 PROD_ENDPTS5   Determines whether slice 5 is an endpoint. 0
    0 No effect. Slice 5 is not an endpoint.  
    1 endpoint. Slice 5 is the endpoint of a product term (minterm). Pin interrupt 5 in the NVIC is raised if the minterm evaluates as true.  
6 PROD_ENDPTS6   Determines whether slice 6 is an endpoint. 0
    0 No effect. Slice 6 is not an endpoint.  
    1 endpoint. Slice 6 is the endpoint of a product term (minterm). Pin interrupt 6 in the NVIC is raised if the minterm evaluates as true.  
7 -   Reserved. Bit slice 7 is automatically considered a product end point. 0
10:8 CFG0   Specifies the match contribution condition for bit slice 0. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  
13:11 CFG1   Specifies the match contribution condition for bit slice 1. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  
16:14 CFG2   Specifies the match contribution condition for bit slice 2. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  
19:17 CFG3   Specifies the match contribution condition for bit slice 3. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  
22:20 CFG4   Specifies the match contribution condition for bit slice 4. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  
25:23 CFG5   Specifies the match contribution condition for bit slice 5. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  
28:26 CFG6   Specifies the match contribution condition for bit slice 6. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  
31:29 CFG7   Specifies the match contribution condition for bit slice 7. 0b000
    0x0 Constant HIGH. This bit slice always contributes to a product term match.  
    0x1 Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x2 Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x3 Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.  
    0x4 High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.  
    0x5 Low level. Match occurs when there is a low level on the specified input.  
    0x6 Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).  
    0x7 Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.  

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