PIN_INT Register and register bit mapping

Register Offset 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
ISEL 0x000 PMODE  
IENR 0x004 ENRL  
SIENR 0x008 SETENRL  
CIENR 0x00C CENRL  
IENF 0x010 ENAF  
SIENF 0x014 SETENAF  
CIENF 0x018 CENAF  
RISE 0x01C RDET  
FALL 0x020 FDET  
IST 0x024 PSTAT  
PMCTRL 0x028 SEL_PMATCH ENA_RXEV   PMAT
PMSRC 0x02C Reserved SRC0 SRC1 SRC2 SRC3 SRC4 SRC5 SRC6 SRC7
PMCFG 0x030 PROD_ENDPTS Reserved CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7

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