PINT Pattern Match engine example

Suppose the desired boolean pattern to be matched is: (IN1) + (IN1 * IN2) + (~IN2 * ~IN3 * IN6fe) + (IN5 * IN7ev)

with:

  • IN6fe = (sticky) falling-edge on input 6
  • IN7ev = (non-sticky) event (rising or falling edge) on input 7

Each individual term in the expression shown above is controlled by one bit-slice. To specify this expression, program the pattern match bit slice source and configuration register fields as follows:

  • PMSRC register ( PINT registerName = PMSRC addressOffset = 0x02C):
    • Since bit slice 5 will be used to detect a sticky event on input 6, you can write a 1 to the SRC5 bits to clear any pre-existing edge detects on bit slice 5.
    • SRC0: 001 - select input 1 for bit slice 0
    • SRC1: 001 - select input 1 for bit slice 1
    • SRC2: 010 - select input 2 for bit slice 2
    • SRC3: 010 - select input 2 for bit slice 3
    • SRC4: 011 - select input 3 for bit slice 4
    • SRC5: 110 - select input 6 for bit slice 5
    • SRC6: 101 - select input 5 for bit slice 6
    • SRC7: 111 - select input 7 for bit slice 7
  • PMCFG register (PINT registerName = PMCFG addressOffset = 0x030):
    • PROD_ENDPTS0 = 1
    • PROD_ENDPTS02 = 1
    • PROD_ENDPTS5 = 1
    • All other slices are not product term endpoints and their PROD_ENDPTS bits are 0. Slice 7 is always a product term endpoint and does not have a register bit associated with it.
    • = 0100101 - bit slices 0, 2, 5, and 7 are product-term endpoints. (Bit slice 7 is an endpoint by default - no associated register bit).
    • CFG0: 000 - high level on the selected input (input 1) for bit slice 0
    • CFG1: 000 - high level on the selected input (input 1) for bit slice 1
    • CFG2: 000 - high level on the selected input (input 2) for bit slice 2
    • CFG3: 101 - low level on the selected input (input 2) for bit slice 3
    • CFG4: 101 - low level on the selected input (input 3) for bit slice 4
    • CFG5: 010 - (sticky) falling edge on the selected input (input 6) for bit slice 5
    • CFG6: 000 - high level on the selected input (input 5) for bit slice 6
    • CFG7: 111 - event (any edge, non-sticky) on the selected input (input 7) for bit slice 7
  • PMCTRL register (PINT registerName = PMCTRL addressOffset = 0x028):
    • Bit0: Setting this bit will select pattern matches to generate the pin interrupts in place of the normal pin interrupt mechanism.

      For this example, pin interrupt 0 will be asserted when a match is detected on the first product term (which, in this case, is just a high level on input 1).

      Pin interrupt 2 will be asserted in response to a match on the second product term.

      Pin interrupt 5 will be asserted when there is a match on the third product term.

      Pin interrupt 7 will be asserted on a match on the last term.

    • Bit1: Setting this bit will cause the RxEv signal to the ARM CPU to be asserted whenever a match occurs on ANY of the product terms in the expression. Otherwise, the RXEV line will not be used.
    • Bit31:24: At any given time, bits 0, 2, 5 and/or 7 may be high if the corresponding product terms are currently matching.
    • The remaining bits will always be low.

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