MRT IDLE_CH addressOffset = 0x0F4

The idle channel register returns the lowest idle channel number. The channel is considered idle when both flags is the STATUS register (RUN and INTFLAG) are zero.

In an application with multiple timers running independently, you can calculate the register offset of the next idle timer by reading the idle channel number in this register. The idle channel register allows you set up the next idle timer without checking the idle state of each timer.

Table 1. MRT registerName = IDLE_CH addressOffset = 0x0F4
Bit Symbol Description Reset value
3:0 - Reserved. 0
7:4 CHAN Idle channel. Reading the CHAN bits, returns the lowest idle timer channel. If all timer channels are running, CHAN = 4. 0
31:8 - Reserved. 0

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