ISP-IAP API Memory and interrupt use for ISP and IAP

Interrupts during UART ISP

The boot block interrupt vectors located in the boot block of the flash are active after any reset.

Interrupts during IAP

The on-chip flash memory is not accessible during erase/write operations. When the user application code starts executing the interrupt vectors from the user flash area are active. Before making any IAP call, either disable the interrupts or ensure that the user interrupt vectors are active in RAM and that the interrupt handlers reside in RAM. The IAP code does not use or disable interrupts.

RAM used by ISP command handler

The stack of ISP commands is located at 0x1000 0270. The maximum stack usage is 540 byte and grows downwards.

RAM used by IAP command handler

The maximum stack usage in the user allocated stack space is 148 bytes and grows downwards.