I2C API I2C Master Transmit/Receive

The Master mode drivers give the user the choice of either polled (wait for the message to finish) or interrupt driven routines (non-blocking). Polled routines are recommended for testing purposes or very simple I2C applications. These routines allow the Master to send to Slaves with 7-bit or 10-bit addresses.

The following routines are polled routines :

err_code i2c_master_transmit_poll(I2C_HANDLE_T*,I2C_PARAM*, I2C_RESULT*)-->
err_code i2c_master_receive_poll(I2C_HANDLE_T*,I2C_PARAM*, I2C_RESULT*)-->
err_code i2c_master_tx_rx_poll (I2C_HANDLE_T*,I2C_PARAM*, I2C_RESULT*)-->

The following routines are interrupt driven routines:

err_code i2c_master_transmit_intr(I2C_HANDLE_T*,I2C_PARAM*, I2C_RESULT*)-->
err_code i2c_master_receive_intr(I2C_HANDLE_T*,I2C_PARAM*, I2C_RESULT*)-->
err_code i2c_master_tx_rx_intr(I2C_HANDLE_T*,I2C_PARAM*, I2C_RESULT*)-->

Where:

  • err_code is the return state of the function. An “0” indicates success. All non-zero indicates an error. Refer to Error Table.
  • I2C_PARM* is a structure with parameters passed to the function. Refer to I2C API PARAM and RESULT structure.
  • I2C_RESULT* is a containing the results after the function executes.

To initiate a master mode write/read the I2C_PARAM has to be setup. The I2C_PARAM is a structure with various variables needed by the I2C ROM Driver to operate correctly. The structure contains the following:

  • Number of bytes to be transmitted.
  • Number of bytes to be receive.
  • Pointer to the transmit buffer.
  • Pointer to the receive buffer.
  • Pointer to callback function.
  • Stop flag.

The RESULT structure contains the results after the function executes. The structure contains the following:

  • Number of bytes transmitted.
  • Number of bytes received.
Note: The number of bytes transmitted will be updated for i2c_master_transmit_intr() and i2c_master_transmit_poll(). The number of bytes received will only be update on i2c_master_receive_poll(), i2c_master_receive_intr(), i2c_master_tx_rx_poll(), and i2c_master_tx_rx_intr().

In all the master mode routines, the transmit buffer’s first byte must be the slave address with the R/W bit set to “0”. To enable a master read, the receive buffer’s first byte must be the slave address with the R/W bit set to “1”.

The following conditions must be fulfilled to use the I2C driver routines in master mode:

  • For 7-bit addressing, the first byte of the send buffer must have the slave address in the most significant 7 bits and the least significant (R/W) bit = 0. Example: Slave address 0x53, first byte is 0xA6.
  • For 7-bit addressing, the first byte of the receive buffer must have the slave address in the most significant 7 bits and the least significant (R/W) bit = 1. Example: Slave Addr 0x53, first byte 0xA7.
  • For 10-bit address, the first byte of the transmit buffer must have the slave address most significant 2 bits with the (R/W) bit =0. The second byte must contain the remaining 8-bit of the slave address.
  • For 10-bit address, the first byte of the receive buffer must have the slave address most significant 2 bits with the (R/W) bit =1. The second byte must contain the remaining 8-bit of the slave address.
  • The number of bytes to be transmitted should include the first byte of the buffer which is the slave address byte. Example: 2 data bytes + 7-bit slave addr = 3.
  • The application program must enable I2C interrupts. When I2C interrupt occurs, the i2c_isr_handler function must be called from the application program.

When using the interrupt function calls, the callback functions must be define. Upon the completion of a read/write as specified by the PARAM structure, the callback functions will be invoked.


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