|Registers / I2C Register description|
The SLVQUAL0 register can alter how Slave Address 0 is interpreted.
|0||QUALMODE0||Reserved. Read value is undefined, only zero should be written.||0|
|0||The SLVQUAL0 field is used as a logical mask for matching address 0.|
|1||The SLVQUAL0 field is used to extend address 0 matching in a range of addresses.|
|7:1||SLVQUAL0||Slave address Qualifier for address 0. A value of 0 causes the
address in SLVADR0 to be used as-is, assuming that it is enabled.
If QUALMODE0 = 0, any bit in this field which is set to 1 will cause an automatic match of the corresponding bit of the received address when it is compared to the SLVADR0 register.
If QUALMODE0 = 1, an address range is matched for address 0. This range extends from the value defined by SLVADR0 to the address defined by SLVQUAL0 (address matches when SLVADR0[7:1] <= received address <= SLVQUAL0[7:1]).
|31:8||-||Reserved. Read value is undefined, only zero should be written.||NA|
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