|Registers / I2C Register description|
The SLVADR[0:3] registers allow enabling and defining one of the addresses that can be automatically recognized by the I^ 2C slave hardware. The value in the SLVADR0 register is qualified by the setting of the SLVQUAL0 register.
When the slave address is compared to the receive address, the compare can be affected by the setting of the SLVQUAL0 register (see I2C SLVQUAL0 addressOffset = 0x058).
The I^ 2C slave function has 4 address comparators. The additional 3 address comparators do not include the address qualifier feature. For handling of the general call address, one of the 4 address registers can be programmed to respond to address 0.
|0||SADISABLE||Slave Address n Disable.||1|
|0||Enabled. Slave Address n is enabled and will be recognized with any changes specified by the SLVQUAL0 register.|
|1||Ignored Slave Address n is ignored.|
|7:1||SLVADR||Seven bit slave address that is compared to received addresses if enabled.||0|
|31:8||-||Reserved. Read value is undefined, only zero should be written.||NA|
© NXP N.V. 2014. All rights reserved.