I2C Configure the I2C for wake-up

In sleep mode, any activity on the I2C-bus that triggers an I2C interrupt can wake up the part, provided that the interrupt is enabled in the INTENSET register and the NVIC. As long as the I2C clock I2C_PCLK remains active in sleep mode, the I2C can wake up the part independently of whether the I2C block is configured in master or slave mode.

In Deep-sleep or Power-down mode, the I2C clock is turned off as are all peripheral clocks. However, if the I2C is configured in slave mode and an external master on the I2C-bus provides the clock signal, the I2C block can create an interrupt asynchronously. This interrupt, if enabled in the NVIC, the STARTERP1 register, and in the I2C block’s INTENCLR register, can then wake up the core.

I2C Wake-up from Sleep mode

  • Enable the I2C interrupt in the NVIC.
  • Enable the I2C wake-up event in the I2C INTENSET register. Wake-up on any enabled interrupts is supported (see the INTENSET register). Examples are the following events:
    • Master pending
    • Change to idle state
    • Start/stop error
    • Slave pending
    • Address match (in slave mode)
    • Data available/ready

I2C Wake-up from Deep-sleep and Power-down modes

  • Enable the I2C interrupt in the NVIC.
  • Enable the I2C interrupt in the STARTERP1 register in the SYSCON block to create the interrupt signal asynchronously while the core and the peripheral are not clocked. See SYSCON registerName = STARTERP1 addressOffset = 0x214.
  • In the PDAWAKE register, configure all peripherals that need to be running when the part wakes up.
  • Configure the I2C in slave mode
  • Enable the I2C the interrupt in the I2C INTENCLR register which configures the interrupt as wake-up event. Examples are the following events:
    • Slave deselect
    • Slave pending (wait for read, write, or ACK)
    • Address match
    • Data available/ready for the monitor

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