CRC Register and register bit mapping

Register Offset 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
MODE 0x00 CRC_POLY BIT_RVS_WR CMPL_WR BIT_RVS_SUM CMPL_SUM Reserved
SEED 0x04 CRC_SEED
SUM 0x08 CRC_SUM
WR_DATA 0x08 CRC_WR_DATA

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